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    ARTICLE

    High Throughput Scheduling Algorithms for Input Queued Packet Switches

    R. Chithra Devi1,*, D. Jemi Florinabel2, Narayanan Prasanth3

    CMC-Computers, Materials & Continua, Vol.70, No.1, pp. 1527-1540, 2022, DOI:10.32604/cmc.2022.019343 - 07 September 2021

    Abstract The high-performance computing paradigm needs high-speed switching fabrics to meet the heavy traffic generated by their applications. These switching fabrics are efficiently driven by the deployed scheduling algorithms. In this paper, we proposed two scheduling algorithms for input queued switches whose operations are based on ranking procedures. At first, we proposed a Simple 2-Bit (S2B) scheme which uses binary ranking procedure and queue size for scheduling the packets. Here, the Virtual Output Queue (VOQ) set with maximum number of empty queues receives higher rank than other VOQ’s. Through simulation, we showed S2B has better throughput More >

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