M. Geetha^1,*, R. Vijayabhasker², Suresh Seetharaman¹

Computer Systems Science and Engineering, Vol.44, No.1, pp. 813-832, 2023, DOI:10.32604/csse.2023.025575 - 01 June 2022

Abstract A basic 7-level MLI topology is developed and the same is extended to the 9-level then further increased to 17-levels. The developed structure minimizes the component’s count and size to draw out the system economy. Despite the various advantages of MLIs, efficiency and reliability play a major role since the usage of components is higher for getting a low Total Harmonics Distortion (THD) value. This becomes a major challenge incorporated in boosting the efficiency without affecting the THD value. Various parametric observations are done and realized for the designed 9-level and 17-level MLI, being the… More >

Chandla Ellis^1,*, C. Chellamuthu¹, J. Jayaseelan²

Intelligent Automation & Soft Computing, Vol.33, No.2, pp. 1121-1138, 2022, DOI:10.32604/iasc.2022.023079 - 08 February 2022

Abstract Nature's remarkable and merciful gift to the planet Earth is sunlight which may be highly lucrative if harvested and harnessed properly. Photovoltaic (PV) panels are used to convert the solar energy to electrical energy which are currently used to feed AC loads/grid. In this paper, modelling, performance and power flow studies of grid connected single phase inverter fed from PV array under steady state as well as transient conditions are considered. This paper focuses on the study and development of analytical model of micro-grid integrated single phase five level cascaded H-bridge inverter (MGISPFLCHBPVI) powered by… More >

R. Chithra Devi^1,*, D. Jemi Florinabel², Narayanan Prasanth³

CMC-Computers, Materials & Continua, Vol.70, No.1, pp. 1527-1540, 2022, DOI:10.32604/cmc.2022.019343 - 07 September 2021

Abstract The high-performance computing paradigm needs high-speed switching fabrics to meet the heavy traffic generated by their applications. These switching fabrics are efficiently driven by the deployed scheduling algorithms. In this paper, we proposed two scheduling algorithms for input queued switches whose operations are based on ranking procedures. At first, we proposed a Simple 2-Bit (S2B) scheme which uses binary ranking procedure and queue size for scheduling the packets. Here, the Virtual Output Queue (VOQ) set with maximum number of empty queues receives higher rank than other VOQ’s. Through simulation, we showed S2B has better throughput More >

Himanshi Babbar¹, Shalli Rani^1,*, Mehedi Masud², Sahil Verma³, Divya Anand⁴, Nz Jhanjhi⁵

CMC-Computers, Materials & Continua, Vol.67, No.1, pp. 1301-1316, 2021, DOI:10.32604/cmc.2021.014627 - 12 January 2021

Abstract In Software-Defined Networks (SDN), the divergence of the control interface from the data plane provides a unique platform to develop a programmable and flexible network. A single controller, due to heavy load traffic triggered by different intelligent devices can not handle due to it’s restricted capability. To manage this, it is necessary to implement multiple controllers on the control plane to achieve quality network performance and robustness. The flow of data through the multiple controllers also varies, resulting in an unequal distribution of load between different controllers. One major drawback of the multiple controllers is… More >

V. Thiyagarajan¹, P. Somasundaram²

CMES-Computer Modeling in Engineering & Sciences, Vol.113, No.4, pp. 461-473, 2017, DOI:10.3970/cmes.2017.113.461

Abstract This paper proposes a novel single phase symmetrical and asymmetrical type extendable multilevel inverter topology with minimum number of switches. The basic circuit of the proposed inverter topology consist of four dc voltage sources and 10 main switches which synthesize 9-level output voltage during symmetrical operation and 17-level output voltage during asymmetrical operation. The comparison between the proposed topology with conventional and other existing inverter topologies is presented in this paper. The advantages of the proposed inverter topology includes minimum switches, less harmonic distortion and minimum switching losses. The performance of the proposed multilevel inverter More >