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  • Open Access

    ARTICLE

    An FPGA Design for Real-Time Image Denoising

    Ahmed Ben Atitallah*

    Computer Systems Science and Engineering, Vol.43, No.2, pp. 803-816, 2022, DOI:10.32604/csse.2022.024393 - 20 April 2022

    Abstract The increasing use of images in miscellaneous applications such as medical image analysis and visual quality inspection has led to growing interest in image processing. However, images are often contaminated with noise which may corrupt any of the following image processing steps. Therefore, noise filtering is often a necessary preprocessing step for the most image processing applications. Thus, in this paper an optimized field-programmable gate array (FPGA) design is proposed to implement the adaptive vector directional distance filter (AVDDF) in hardware/software (HW/SW) codesign context for removing noise from the images in real-time. For that, the… More >

  • Open Access

    ARTICLE

    Hardware Acceleration of Image and Video Processing on Xilinx Zynq Platform

    Praveenkumar Babu, Eswaran Parthasarathy*

    Intelligent Automation & Soft Computing, Vol.30, No.3, pp. 1063-1071, 2021, DOI:10.32604/iasc.2021.018903 - 20 August 2021

    Abstract Advancements in image and video processing are growing over the years for industrial robots, autonomous vehicles, indexing databases, surveillance, medical imaging and computer-human interaction applications. One of the major challenges in real-time image and video processing is the execution of complex functions and high computational tasks. In this paper, the hardware acceleration of different filter algorithms for both image and video processing is implemented on Xilinx Zynq®-7000 System on-Chip (SoC) device. It consists of Dual-core Cortex-A9 processors which provide computing ability to perform I/O and processing functions and software libraries using Vivado® High-Level Synthesis (HLS). In the More >

  • Open Access

    ARTICLE

    An Optimized SW/HW AVMF Design Based on High-Level Synthesis Flow for Color Images

    Turki M. Alanazi1, Ahmed Ben Atitallah1,2,*, Imen Abid2

    CMC-Computers, Materials & Continua, Vol.68, No.3, pp. 2925-2943, 2021, DOI:10.32604/cmc.2021.017575 - 06 May 2021

    Abstract In this paper, a software/hardware High-level Synthesis (HLS) design is proposed to compute the Adaptive Vector Median Filter (AVMF) in real-time. In fact, this filter is known by its excellent impulsive noise suppression and chromaticity conservation. The software (SW) study of this filter demonstrates that its implementation is too complex. The purpose of this work is to study the impact of using an HLS tool to design ideal floating-point and optimized fixed-point hardware (HW) architectures for the AVMF filter using square root function (ideal HW) and ROM memory (optimized HW), respectively, to select the best… More >

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