Ameen Bin Obadi¹, Alaa El-Din Hussein², Samir Salem Al-Bawri^3,4,*, Kabir Hossain⁵, Abdullah Abdulhameed⁴, Muzammil Jusoh^1,6,7, Thennarasan Sabapathy^1,6, Ahmed Jamal Abdullah Al-Gburi⁸, Mahmoud A. Albreem⁹

CMC-Computers, Materials & Continua, Vol.74, No.3, pp. 5885-5900, 2023, DOI:10.32604/cmc.2023.033789 - 28 December 2022

Abstract This article presents an integrated current mode configurable analog block (CAB) system for field-programmable analog array (FPAA). The proposed architecture is based on the complementary metal-oxide semiconductor (CMOS) transistor level design where MOSFET transistors operating in the saturation region are adopted. The proposed CAB architecture is designed to implement six of the widely used current mode operations in analog processing systems: addition, subtraction, integration, multiplication, division, and pass operation. The functionality of the proposed CAB is demonstrated through these six operations, where each operation is chosen based on the user’s selection in the CAB interface… More >

Shruti Jain¹, Cherry Bhargava², Vijayakumar Varadarajan³, Ketan Kotecha^4,*

CMC-Computers, Materials & Continua, Vol.72, No.1, pp. 1815-1829, 2022, DOI:10.32604/cmc.2022.024004 - 24 February 2022

Abstract In the recent decade, different researchers have performed hardware implementation for different applications covering various areas of experts. In this research paper, a novel analog design and implementation of different steps of fuzzy systems with current differencing buffered amplifier (CDBA) are proposed with a compact structure that can be used in many signal processing applications. The proposed circuits are capable of wide input current range, simple structure, and are highly linear. Different electrical parameters were compared for the proposed fuzzy system when using different membership functions. The novelty of this paper lies in the electronic… More >

G. Prathiba^1,*, M. Santhi²

Intelligent Automation & Soft Computing, Vol.31, No.3, pp. 1611-1626, 2022, DOI:10.32604/iasc.2022.018975 - 09 October 2021

Abstract High-quality, high-resolution flash ADCs are used in reliable VLSI (Very Large-Scale Integrated) circuits to minimize the power consumption. An analogue electrical signal is converted into a discrete-valued sequence by these ADCs. This paper proposes a four-bit 1.2GS/s low-power Clocked Flash ADC (C-FADC). A low-power Clocked-Improved Threshold Inverter Quantization (CITIQ) comparator, an Adaptive Bubble Free (ABF) logic circuit, and a compact Binary Encoder (BE) are all part of the presented structure. A clock network in the comparator circuit reduces skew and jitters, while an ABF logic circuit detects and corrects fourth order bubble faults detected from More >

Xiaorong Zhao¹, Weili Cheng², Hongjin Zhu¹, Chunpeng Ge³, Gengyuan Zhou^{1, *}, Zhongjun Fu¹

CMC-Computers, Materials & Continua, Vol.64, No.2, pp. 1139-1151, 2020, DOI:10.32604/cmc.2020.010220 - 10 June 2020

Abstract With the development of the times, people’s requirements for communication technology are becoming higher and higher. 4G communication technology has been unable to meet development needs, and 5G communication technology has emerged as the times require. This article proposes the design of a low-noise amplifier (LNA) that will be used in the 5G band of China Mobile Communications. A low noise amplifier for mobile 5G communication is designed based on Taiwan Semiconductor Manufacturing Company (TSMC) 0.13 μm Radio Frequency (RF) Complementary Metal Oxide Semiconductor (CMOS) process. The LNA employs self-cascode devices in currentreuse configuration to… More >

Xiaorong Zhao¹, Hongjin Zhu¹, Peizhong Shi¹, Chunpeng Ge², Xiufang Qian^1,*, Honghui Fan¹, Zhongjun Fu¹

CMC-Computers, Materials & Continua, Vol.60, No.1, pp. 133-145, 2019, DOI:10.32604/cmc.2019.05661

Abstract With the rapid development of ultra-wideband communications, the design requirements of CMOS radio frequency integrated circuits have become increasingly high. Ultra-wideband (UWB) low noise amplifiers are a key component of the receiver front end. The paper designs a high power gain (S₂₁) and low noise figure (NF) common gate (CG) CMOS UWB low noise amplifier (LNA) with an operating frequency range between 3.1 GHz and 10.6 GHz. The circuit is designed by TSMC 0.13 μm RF CMOS technology. In order to achieve high gain and flat gain as well as low noise figure, the circuit uses… More >