Open Access

ARTICLE

Security Empowered System-on-Chip Selection for Internet of Things

Ramesh Krishnamoorthy^*, Kalimuthu Krishnan

Department of ECE, SRM Institute of Science and Technology, Chennai, 603203, India

* Corresponding Author: Ramesh Krishnamoorthy. Email:

Intelligent Automation & Soft Computing 2021, 30(2), 403-418. https://doi.org/10.32604/iasc.2021.018560

Received 12 March 2021; Accepted 25 April 2021; Issue published 11 August 2021

Abstract

Due to the rapid growth of embedded devices, the selection of System-on-Chip (SoC) has a stronger influence to enable hardware security in embedded system design. System-on-chip (SoC) devices consist of one or more CPUs through wide-ranging inbuilt peripherals for designing a system with less cost. The selection of SoC is more significant to determine the suitability for secured application development. The design space analysis of symmetric key approaches including rivest cipher (RC5), advanced encryption standard (AES), data encryption standard (DES), international data encryption algorithm (IDEA), elliptic curve cryptography (ECC), MX algorithm, and the secure hash algorithm (SHA-256) are compared to identify the suitable algorithm for implementation of on-chip security. The implementation of state-of-the-art crypto functions on FPGA for design space findings provide the power and area consumption requirement. The proposed work utilizes the Genetic Algorithm (GA) optimization technique to determine the fitness of the SoC with enhanced crypto algorithms to enable device security. To validate the device result attained through the GA model, the security benchmarks are implemented on GA resultant hardware devices and analyzed the execution time and performance. The accuracy of the algorithm is estimated using the confusion matrix method and attained 89.66% accuracy. Besides, several challenges that need to overcome for IoT system design from prototype model to the industrial application are discussed extensively.

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