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ARTICLE
PSO Based Torque Ripple Minimization Of Switched Reluctance Motor Using FPGA Controller
1 Department of Electrical and Electronics Engineering, Mohamed Sathak Engineering College, Ramanathapuram, India
2 Department of Electrical and Electronics Engineering, National Engineering College, Kovilpatti, 628503, India
* Corresponding Author: A. Manjula. Email:
Intelligent Automation & Soft Computing 2021, 29(2), 451-465. https://doi.org/10.32604/iasc.2021.016088
Received 22 December 2020; Accepted 08 March 2021; Issue published 16 June 2021
Abstract
The fast-growing field of mechanical robotization necessitates a well-designed and controlled version of electric drives. The concept of control concerning mechanical characteristics also requires a methodology in which the system needs to be modeled precisely and deals with uncertainty. The proposed method provides the enhanced performance of Switched Reluctance Motor (SRM) by controlling its speed and minimized torque ripple. Proportional-Integral-Derivative (PID) controllers have drawn more attention in industry automation due to their ease and robustness. The performances are further improved by using fractional order (Non-integer) controllers. The Modified Particle Swarm Optimization (MPSO) based optimization approach is employed to acquire the FOPID control parameters for speed and current and the selection of commutation of angles. The performance of SRM has been investigated by considering the Integral Square Error (ISE) of speed and current, which results in minimized torque ripples. In this work, SRM with 8 stator poles and 6 rotor poles is modeled as four-phase in MATLAB/SIMULINK platform. The average output torque and speed of the proposed method are analyzed and compared with the conventional PID controller. The results reveal that MPSO based FOPID controller gives an extreme performance in terms of increased output torque and faster settling time because of its consistent performing capability compared with conventional PID-based controller. The results are validated with an FPGA-based 8/6 SRM setup that employs the PID controller.Keywords
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