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Novel Double Modular Redundancy Based Fault-Tolerant FIR Filter for Image Denoising
1 Department of Electronics and Communication Engineering, Nehru Institute of Engineering and Technology, Coimbatore, 641105, India
2 Department of Computer Science and Engineering, KPR Institute of Engineering and Technology, Coimbatore, 641105, India
* Corresponding Author: V. S. Vaisakhi. Email:
Computer Systems Science and Engineering 2023, 46(1), 181-193. https://doi.org/10.32604/csse.2023.032514
Received 20 May 2022; Accepted 24 June 2022; Issue published 20 January 2023
Abstract
In signal processing and communication systems, digital filters are widely employed. In some circumstances, the reliability of those systems is crucial, necessitating the use of fault tolerant filter implementations. Many strategies have been presented throughout the years to achieve fault tolerance by utilising the structure and properties of the filters. As technology advances, more complicated systems with several filters become possible. Some of the filters in those complicated systems frequently function in parallel, for example, by applying the same filter to various input signals. Recently, a simple strategy for achieving fault tolerance that takes advantage of the availability of parallel filters was given. Many fault-tolerant ways that take advantage of the filter’s structure and properties have been proposed throughout the years. The primary idea is to use structured authentication scan chains to study the internal states of finite impulse response (FIR) components in order to detect and recover the exact state of faulty modules through the state of non-faulty modules. Finally, a simple solution of Double modular redundancy (DMR) based fault tolerance was developed that takes advantage of the availability of parallel filters for image denoising. This approach is expanded in this short to display how parallel filters can be protected using error correction codes (ECCs) in which each filter is comparable to a bit in a standard ECC. “Advanced error recovery for parallel systems,” the suggested technique, can find and eliminate hidden defects in FIR modules, and also restore the system from multiple failures impacting two FIR modules. From the implementation, Xilinx ISE 14.7 was found to have given significant error reduction capability in the fault calculations and reduction in the area which reduces the cost of implementation. Faults were introduced in all the outputs of the functional filters and found that the fault in every output is corrected.Keywords
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