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Parametric Evaluation of Routing Algorithms in Network on Chip Architecture

Mohammad Behrouzian Nejad

Department of Computer Engineering, Shadegan Branch, Islamic Azad University, Shadegan, Iran

* Corresponding Author: Mohammad Behrouzian Nejad, email

Computer Systems Science and Engineering 2020, 35(5), 367-375. https://doi.org/10.32604/csse.2020.35.367

Abstract

Considering that routing algorithms for the Network on Chip (NoC) architecture is one of the key issues that determine its ultimate performance, several things have to be considered for developing new routing algorithms. This includes examining the strengths, capabilities, and weaknesses of the commonly proposed algorithms as a starting point for developing new ones.
Because most of the algorithms presented are based on the well-known algorithms that are studied and evaluated in this research. Finally, according to the results produced under different conditions, better decisions can be made when using the aforementioned algorithms as well as when presenting new routing algorithms. In this research, we first describe the existing algorithms include: XY, YX, Odd- Even and DyAD. We then evaluate each of the routing algorithms which naturally have their own strengths and weaknesses under different conditions. In the first scenario, based on the criteria of average latency, average throughput and average energy consumption in determining the final performance of the network on the chip, we show the algorithms in terms of their performance by deterministic and adaptive routing algorithms. In the second scenario, we evaluate the algorithms based on the network size and the number of cores on the chip. As a result, these algorithms can make better decisions when using these algorithms as well as when presenting new routing algorithms, considering the results produced under different condition.

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Cite This Article

APA Style
Nejad, M.B. (2020). Parametric evaluation of routing algorithms in network on chip architecture. Computer Systems Science and Engineering, 35(5), 367-375. https://doi.org/10.32604/csse.2020.35.367
Vancouver Style
Nejad MB. Parametric evaluation of routing algorithms in network on chip architecture. Comput Syst Sci Eng. 2020;35(5):367-375 https://doi.org/10.32604/csse.2020.35.367
IEEE Style
M.B. Nejad, “Parametric Evaluation of Routing Algorithms in Network on Chip Architecture,” Comput. Syst. Sci. Eng., vol. 35, no. 5, pp. 367-375, 2020. https://doi.org/10.32604/csse.2020.35.367

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cc Copyright © 2020 The Author(s). Published by Tech Science Press.
This work is licensed under a Creative Commons Attribution 4.0 International License , which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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