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Optimizing AES S-Box Implementation: A SAT-Based Approach with Tower Field Representations

Jingya Feng1, Ying Zhao2,*, Tao Ye1, Wei Feng3,*

1 School of Computer Science and Information Security, Guilin University of Electronic Technology, Guilin, 541004, China
2 School of Computing and Information Systems, The University of Melbourne, Melbourne, 3010, Australia
3 Guangxi Wangxin Information Technology Co., Ltd., Nanning, 530000, China

* Corresponding Authors: Ying Zhao. Email: email; Wei Feng. Email: email

Computers, Materials & Continua 2025, 83(1), 1491-1507. https://doi.org/10.32604/cmc.2025.059882

Abstract

The efficient implementation of the Advanced Encryption Standard (AES) is crucial for network data security. This paper presents novel hardware implementations of the AES S-box, a core component, using tower field representations and Boolean Satisfiability (SAT) solvers. Our research makes several significant contributions to the field. Firstly, we have optimized the GF() inversion, achieving a remarkable 31.35% area reduction (15.33 GE) compared to the best known implementations. Secondly, we have enhanced multiplication implementations for transformation matrices using a SAT-method based on local solutions. This approach has yielded notable improvements, such as a 22.22% reduction in area (42.00 GE) for the top transformation matrix in GF(()2)-type S-box implementation. Furthermore, we have proposed new implementations of GF((()2)2)-type and GF(()2)-type S-boxes, with the GF((()2)2)-type demonstrating superior performance. This implementation offers two variants: a small area variant that sets new area records, and a fast variant that establishes new benchmarks in Area-Execution-Time (AET) and energy consumption. Our approach significantly improves upon existing S-box implementations, offering advancements in area, speed, and energy consumption. These optimizations contribute to more efficient and secure AES implementations, potentially enhancing various cryptographic applications in the field of network security.

Keywords

AES S-box; SAT optimization; tower field; hardware implementation; area efficiency; energy consumption

Cite This Article

APA Style
Feng, J., Zhao, Y., Ye, T., Feng, W. (2025). Optimizing AES s-box implementation: A sat-based approach with tower field representations. Computers, Materials & Continua, 83(1), 1491–1507. https://doi.org/10.32604/cmc.2025.059882
Vancouver Style
Feng J, Zhao Y, Ye T, Feng W. Optimizing AES s-box implementation: A sat-based approach with tower field representations. Comput Mater Contin. 2025;83(1):1491–1507. https://doi.org/10.32604/cmc.2025.059882
IEEE Style
J. Feng, Y. Zhao, T. Ye, and W. Feng, “Optimizing AES S-Box Implementation: A SAT-Based Approach with Tower Field Representations,” Comput. Mater. Contin., vol. 83, no. 1, pp. 1491–1507, 2025. https://doi.org/10.32604/cmc.2025.059882



cc Copyright © 2025 The Author(s). Published by Tech Science Press.
This work is licensed under a Creative Commons Attribution 4.0 International License , which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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