Open Access

ARTICLE

Design and Analysis of Graphene Based Tunnel Field Effect Transistor with Various Ambipolar Reducing Techniques

Puneet Kumar Mishra¹, Amrita Rai¹, Nitin Sharma², Kanika Sharma³, Nitin Mittal⁴, Mohd Anul Haq^5,*, Ilyas Khan⁶, ElSayed M. Tag El Din⁷

1 Department of Electronics and Communication Engineering, G L Bajaj Institute of Technology and Manegment, Gretear Noida, India
2 Department of Electronics and Communication Engineering, Chandigarh Unievrsity, Mohali, Punjab, India
3 Department of Electronics and Communication Engineering, NITTTR, Chandigarh, India
4 University Center of Research & Development, Chandigarh University, Mohali, 121102, India
5 Department of Computer Science, College of Computer and Information Sciences, Majmaah University, Al-Majmaah, 11952, Saudi Arabia
6 Department of Mathematics, College of Science Al-Zulfi, Majmaah University, 11952, Al-Majmaah, Saudi Arabia
7 Electrical Engineering Department, Faculty of Engineering & Technology, Future University in Egypt, New Cairo, 11835, Egypt

* Corresponding Author: Mohd Anul Haq. Email:

Computers, Materials & Continua 2023, 76(1), 1309-1320. https://doi.org/10.32604/cmc.2023.033828

Received 29 June 2022; Accepted 08 December 2022; Issue published 08 June 2023

Abstract

The fundamental advantages of carbon-based graphene material, such as its high tunnelling probability, symmetric band structure (linear dependence of the energy band on the wave direction), low effective mass, and characteristics of its 2D atomic layers, are the main focus of this research work. The impact of channel thickness, gate under-lap, asymmetric source/drain doping method, workfunction of gate contact, and High-K material on Graphene-based Tunnel Field Effect Transistor (TFET) is analyzed with 20 nm technology. Physical modelling and electrical characteristic performance have been simulated using the Atlas device simulator of SILVACO TCAD with user-defined material syntax for the newly included graphene material in comparison to silicon carbide (SiC). The simulation results in significant suppression of ambipolar current to voltage characteristics of TFET and modelled device exhibits a significant improvement in subthreshold swing (0.0159 V/decade), the ratio of Ion/Ioff (1000), and threshold voltage (−0.2 V with highly doped p-type source and 0.2 V with highly doped n-type drain) with power supply of 0.5 V, which make it useful for low power digital applications.

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Keywords

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