Open Access

ARTICLE

MCRO-PUF: A Novel Modified Crossover RO-PUF with an Ultra-Expanded CRP Space

Hassan Rabiei¹, Masoud Kaveh², Mohammad Reza Mosavi¹, Diego Martín^3,*

1 Department of Electrical Engineering, Iran University of Science and Technology, Tehran, 13114-16846, Iran
2 Department of Communication and Networking, Aalto University, Espoo, 00076, Finland
3 ETSI de Telecomunicación, Universidad Politécnica de Madrid, Av. Complutense 30, Madrid, 28040, Spain

* Corresponding Author: Diego Martín. Email:

Computers, Materials & Continua 2023, 74(3), 4831-4845. https://doi.org/10.32604/cmc.2023.034981

Received 02 August 2022; Accepted 20 October 2022; Issue published 28 December 2022

Abstract

With the expanding use of the Internet of Things (IoT) devices and the connection of humans and devices to the Internet, the need to provide security in this field is constantly growing. The conventional cryptographic solutions need the IoT device to store secret keys in its non-volatile memory (NVM) leading the system to be vulnerable to physical attacks. In addition, they are not appropriate for IoT applications due to their complex calculations. Thus, physically unclonable functions (PUFs) have been introduced to simultaneously address these issues. PUFs are lightweight and easy-to-access hardware security primitives which employ the unique characteristics of integrated circuits (ICs) to generate secret keys. Among all proposed PUFs, ring oscillator PUF (RO-PUF) has had a more suitable structure for hardware implementation because of its high reliability and easier providing of circuital symmetry. However, RO-PUF has not been so attractive for authentication purposes due to its limited supported challenge-response pairs (CRPs). A few efforts have been made in recent years that could successfully improve the RO-PUF CRP space, such as configurable RO-PUF (CRO-PUF). In this paper, by considerably improving the CRO-PUF structure and adding spare paths, we propose a novel strong RO-PUF structure that exponentially grows the CRP space and dramatically reduces the hardware cost. We implement our design on a simple and low-cost FPGA chip named XC6SLX9-2tqg144, stating that the proposed design can be used in IoT applications. In addition, to improve the CRP space, our design creates a suitable improvement in different security/performance terms of the generated responses, and dramatically outperforms the state-of-the-art. The average reliability, uniqueness, and uniformity of the responses generated are 99.55%, 48.49%, and 50.99%, respectively.

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Keywords

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