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High Throughput Scheduling Algorithms for Input Queued Packet Switches

R. Chithra Devi1,*, D. Jemi Florinabel2, Narayanan Prasanth3

1 Department of IT, Dr. Sivanthi Aditanar College of Engineering, Tiruchendur, 628205, India
2 Department of CSE, Dr. Sivanthi Aditanar College of Engineering, Tiruchendur, 628205, India
3 School of CSE, Vellore Institute of Technology, Vellore, 632014, India

* Corresponding Author: R. Chithra Devi. Email: email

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