Open Access

ARTICLE

High Throughput Scheduling Algorithms for Input Queued Packet Switches

R. Chithra Devi^1,*, D. Jemi Florinabel², Narayanan Prasanth³

1 Department of IT, Dr. Sivanthi Aditanar College of Engineering, Tiruchendur, 628205, India
2 Department of CSE, Dr. Sivanthi Aditanar College of Engineering, Tiruchendur, 628205, India
3 School of CSE, Vellore Institute of Technology, Vellore, 632014, India

* Corresponding Author: R. Chithra Devi. Email:

Computers, Materials & Continua 2022, 70(1), 1527-1540. https://doi.org/10.32604/cmc.2022.019343

Received 10 April 2021; Accepted 20 May 2021; Issue published 07 September 2021

Abstract

The high-performance computing paradigm needs high-speed switching fabrics to meet the heavy traffic generated by their applications. These switching fabrics are efficiently driven by the deployed scheduling algorithms. In this paper, we proposed two scheduling algorithms for input queued switches whose operations are based on ranking procedures. At first, we proposed a Simple 2-Bit (S2B) scheme which uses binary ranking procedure and queue size for scheduling the packets. Here, the Virtual Output Queue (VOQ) set with maximum number of empty queues receives higher rank than other VOQ’s. Through simulation, we showed S2B has better throughput performance than Highest Ranking First (HRF) arbitration under uniform, and non-uniform traffic patterns. To further improve the throughput-delay performance, an Enhanced 2-Bit (E2B) approach is proposed. This approach adopts an integer representation for rank, which is the number of empty queues in a VOQ set. The simulation result shows E2B outperforms S2B and HRF scheduling algorithms with maximum throughput-delay performance. Furthermore, the algorithms are simulated under hotspot traffic and E2B proves to be more efficient.

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Keywords

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