Open Access

ARTICLE

A High Gain, Noise Cancelling 3.1-10.6 GHz CMOS LNA for UWB Application

Xiaorong Zhao¹, Hongjin Zhu¹, Peizhong Shi¹, Chunpeng Ge², Xiufang Qian^1,*, Honghui Fan¹, Zhongjun Fu¹

1 College of Computer Engineering, Jiangsu University of Technology, 1801 Zhongwu Rd., Changzhou, 213001, China.
2 Singapore University of Technology and Design, Changi South Avenue 1, 485996, Singapore.

* Corresponding Author: Xiufang Qian. Email: .

Computers, Materials & Continua 2019, 60(1), 133-145. https://doi.org/10.32604/cmc.2019.05661

Abstract

With the rapid development of ultra-wideband communications, the design requirements of CMOS radio frequency integrated circuits have become increasingly high. Ultra-wideband (UWB) low noise amplifiers are a key component of the receiver front end. The paper designs a high power gain (S₂₁) and low noise figure (NF) common gate (CG) CMOS UWB low noise amplifier (LNA) with an operating frequency range between 3.1 GHz and 10.6 GHz. The circuit is designed by TSMC 0.13 μm RF CMOS technology. In order to achieve high gain and flat gain as well as low noise figure, the circuit uses many technologies. To improve the input impedance matching at low frequencies, the circuit uses the proposed T-match input network. To decrease the total dissipation, the circuit employs current reused technique. The circuit uses he noise cancelling technique to decreases the NF. The simulation results show a flat S₂₁>20.81 dB, the reverse isolation (S₁₂) less than -48.929 dB, NF less than 2.617 dB, the minimum noise figure (NF_min)=1.721 dB, the input return loss (S11) and output return loss (S₂₂) are both less than -14.933 dB over the frequency range of 3.1 GHz to 10.6 GHz. The proposed UWB LNA consumes 1.548 mW without buffer from a 1.2 V power supply.

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Keywords

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