Open Access

ARTICLE

Bus Encoded LUT Multiplier for Portable Biomedical Therapeutic Devices

R. Praveena¹, S. Nirmala²

1 Sengunthar college of Engineering, Tiruchengode, e-mail: praveenajuhi@gmail.com
2 Muthayammal Engineering College, Rasipuram, e-mail: nirmala.ramkamal@gmail.com

Computers, Materials & Continua 2017, 53(1), 37-47. https://doi.org/10.3970/cmc.2017.053.039

Abstract

DSP operation in a Biomedical related therapeutic hardware need to be performed with high accuracy and with high speed. Portable DSP hardware’s like pulse/heart beat detectors must perform with reduced operational power due to lack of conventional power sources. This work proposes a hybrid biomedical hardware chip in which the speed and power utilization factors are greatly improved. Multipliers are the core operational unit of any DSP SoC. This work proposes a LUT based unsigned multiplication which is proven to be efficient in terms of high operating speed. For n bit input multiplication n*n memory array of 2n bit size is required to memorize all the possible input and output combination. Various literature works claims to be achieve high speed multiplication with reduced LUT size by integrating a barrel shifter mechanism. This paper work address this problem, by reworking the multiplier architecture with a parallel operating pre-processing unit which used to change the multiplier and multiplicand order with respect to the number of computational addition and subtraction stages required. Along with LUT multiplier a low power bus encoding scheme is integrated to limit the power constraint of the on chip DSP unit. This paper address both the speed and power optimization techniques and tested with various FPGA device families.

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Keywords

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