Open Access

ARTICLE

Modeling and Analysis of Novel Multilevel Inverter Topology with Minimum Number of Switching Components

V. Thiyagarajan¹, P. Somasundaram²

1 Department of EEE, SSN College of Engineering, Kalavakkam, Tamilnadu, 603110, India.
2 Department of EEE, CEG, Anna University, Chennai, Tamilnadu, 600 025, India.
Corresponding Author: Email: thiyagarajanv@ssn.edu.in

Computer Modeling in Engineering & Sciences 2017, 113(4), 461-473. https://doi.org/10.3970/cmes.2017.113.461

Abstract

This paper proposes a novel single phase symmetrical and asymmetrical type extendable multilevel inverter topology with minimum number of switches. The basic circuit of the proposed inverter topology consist of four dc voltage sources and 10 main switches which synthesize 9-level output voltage during symmetrical operation and 17-level output voltage during asymmetrical operation. The comparison between the proposed topology with conventional and other existing inverter topologies is presented in this paper. The advantages of the proposed inverter topology includes minimum switches, less harmonic distortion and minimum switching losses. The performance of the proposed multilevel inverter topology has been analyzed in both symmetrical and asymmetrical conditions. The simulation model is developed using MATLAB/SIMULINK software to verify the performance of the proposed inverter.

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Keywords

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